IC 28nm CMOS28FDSOI

IC STMicroelectronics 28nm Advanced CMOS FDSOI 8 ML CMOS28FDSOI

TECHNOLOGY CHARACTERISTICS :

Gate length : 28nm drawn poly length
Triple well Fully Depleted SOI devices, with ultrathin BOX and Ground Plane.
Dual Vt MOS transistors (LVT, RVT)
Dual gate oxide (1.0V for core and 1.8V for IO)
Dual-damascene copper for interconnect.
8 metal layers (8ML)for interconnect.
10 metal layers (10ML) process flavor with MiM capacitor are still offered as standard option on the 2 first MPW runs in 2017.
0.1um metal pitch.
Power supplies supported: 1.8V, 1.0V
Embedded memory (Single port RAM / ROM / Double Port RAM ).

Introduction to FD-SOI video

DESIGN KIT VERSION :

2.9

Frontend Backend tools :

Cadence IC 6.1.7

Simulation tools :

Spectre (Cadence), Eldo (Mentor Graphics), Hspice (Synopsys), ADS Momentum (Keysight), GoldenGate (Keysight)

Verification tools :

Calibre (Mentor Graphics) PVS (Cadence)

Parasitics extraction tools :

StarRCXT (Synopsys), QRC (Cadence), Calibre xRC (Mentor Graphics)

Place route tools :

Innovus (Cadence), ICC (Synopsys)

LIBRARIES :

CORE cells Libraries: - CORE: General purpose core libraries - CORX: Complementary core libraries (complex gates) - CLOCK: Buffer cells and the same for clock tree synthesis - PR: Place and route filler cells and the same. On request: - DP: Datapath leaf cells libraries - HD: High density core libraries IO cells Libraries: - 1.8V, 2.5V, 3.3V IO pads: - 80µ, 65µ, 60µ, 50µ 40µ and 30µ IO pads : Digital and Analog - Staggered IO pads - Flip-Chip pads - Level Shifters, and compensation cells On request: - LVDS Pads - DLL, PLL - …

TURNAROUND TIME :

28-36 weeks (from GDS2 tape to packaged parts)