OPEN 3D Frontside UBM post-process

OPEN 3D IRT Nanoelec/LETI-CEA Wafer-level packaging Frontside UBM post-process

TECHNOLOGY CHARACTERISTICS :

PNG - 623.3 kb Under Bump Metalization (or UBM) is processed on top of Aluminum or Copper Pads. It allows flip-chip reporting of a silicon die on top of the UBM pad for 3D applications. UBM is process is selective (with an additional mask) and operated at wafer level in CEA LETI cleanroom after original foundry fab out. UBM is composed of a 1 µm thick Ti/Ni/Au stack, minimum width is 25 µm and minimum pitch is 50 µm.

This post-process is available for projects and wafers processed through CMP. Guaranteed minimum delivered pieces: 40.

OPEN 3D UBM post-process option is available as an MPW on the last CMP runs of the year on selected technologies nodes and are subject to a minimum participation. Compatible technologies are: ams C35B4M3, ST CMOS065, ST CMOS028, ST BiCMOS9MW, ST BiCMOS055.

Dedicated run for OPEN3D UBM post-process are available on any CMP runs (upon feasibility study).

OPEN 3D post-process must be anticipated at an early stage of the project as they require an additional NDA, the distribution a specific DRM and an add-on to the Design-Kit. You must indicate it in the reservation form.

APPLICATION AREA :

3D/2.5D integration

DESIGN KIT VERSION :

CMP/LETI 3D add-on is required to design post-processed modules. Please refer to the data sheet for more information.

Verification tools :

DRC calibre die-level; DRC calibre 3Dstack for assembly-level checks (at CMP only)

LIBRARIES :

3D modules Library