Achieving wireless communications at 5-30Mb/s in energy-harvesting Internet-of-Things (IoT) applications requires energy efficiencies better than 100pJ/bit. Impulse-radio ultra-wideband (UWB) communications offer an efficient way to achieve high data rate at ultra-low power for short-range links. We propose a digital UWB transmitter System-on-Chip (SoC) designed for ultra-low voltage in 28nm FDSOI CMOS. It features a PLL-free architecture, which exploits the duty cycling nature of impulse radio through aggressive duty cycling within the pulse modulation time slot for high energy efficiency and minimum jitter accumulation. Wide-range on-chip adaptive Forward Back Biasing (FBB) is used for threshold voltage reduction, PVT compensation and tuning of both the carrier frequency and the output power. To ensure spectral compliance with output power regulations without the use of bulky and expensive off-chip filters, a programmable pulse-shaping functionality is integrated in the digital power amplifier based on a 7-9GS/s 5-bit current DAC. Operated at 0.55V, it achieves a record energy efficiency of 14pJ/bit for the transmitter alone and 24pJ/bit for the complete SoC with embedded power management. The transmitter SoC occupies a core area of 0.93mm.