Products :: IC's Manufacturing :: CMOS 90nm (CMOS090) from STMicroelectronics

TECHNOLOGY:	CMOS 90nm (CMOS090) from STMicroelectronics
Spec. process char.:	Gate length : 90nm drawn poly length Dual Vt MOS transistors Dual gate oxide Dedicated process flavors for high performance or low power Dual-damascene copper for interconnect. 0.28um metallization pitch. Analog / RF capabilities. Various power supplies supported : 3.3V, 2.5V, 1.2V, 1V NB: the 1.8V option is no longer supported Dual standard cell libraries (density / speed), (430kgates/mm2 / 350 kgates/mm2). Total of > 1000 core cells Gate delay of 11ps (standard Vt) Embedded memory SRAM/ ROM/ DRAM

CAD TOOLS:
Workstation based:	The design kits are supported under Cadence for full-custom analog / RF: Analog-Artist, Composer, Eldo, Spectre, NCSim, Virtuoso & Layout-XL & ICC. DRC/LVS are supported under Mentor / Calibre.

LIBRARIES:	Standard-cells design flows are supported under Synopsys Design-Compiler / Physical Compiler and Cadence / SOC Encounter.

PACKAGING:	All standard packages (DIL, LCC, PGA,...)

TEST:	Contact CMP

INTERFACE FORMAT:	GDSII, CADENCE

SPICE parameters:	SPECTRE, ELDO, HSPICE

DESIGN SUPPORT:	DRC checking (free for submitted designs), and extended ERC on digital/mixed A/D designs

PRICES:
Cell libraries:	Distributed for free by CMP
Design kits:	Distributed for free by CMP
Prototyping:	See the general CMP price list for prototyping

TURNAROUND TIME:
Typical:	13 weeks (from GDS2 tape to packaged parts)

Contact

Jean-Francois PAILLOTIN
Ph.: +33 4 76 57 47 97
Fax: +33 4 76 47 38 14

Kholdoun TORKI,
Ph.: +33 4 76 57 47 63
Fax: +33 4 76 47 38 14

CMP
46 Av. Félix Viallet
38031 GRENOBLE Cedex
France