Process Catalog

JPEG - 159.3 kbCMP > is a service organization in ICs and MEMS for prototyping and low volume productions.

  • CMP provides several regular and advanced CMOS technologies. BiCMOS RF, High voltage and Smart power are among our Specialty technology portfolio.
  • CMP provides two types of MEMS technologies for prototyping: Integrated bulk micromachining technologies and specific surface micromachining technologies.

—>Click on the name of the button to open the corresponding window.

IC 28nm CMOS28FDSOI

STMicroelectronics
Advanced CMOS FDSOI technology with 10 metal layers
Next run: 2016/11/02

IC 55nm BiCMOS055

STMicroelectronics
BiCMOS SiGe technology with 8 metal layers
Next run: 2016/10/24

IC 65nm CMOS065

STMicroelectronics
Advanced CMOS technology with 7 metal layers
Next run: 2016/10/17

IC 130nm BiCMOS9MW

STMicroelectronics
BiCMOS SiGe technology with 6 metal layers
Next run: 2016/11/21

IC 130nm H9SOI-FEM

STMicroelectronics
Advanced CMOS SOI technology with 4 metal layers
Next run: 2016/11/14

IC 130nm HCMOS9GP

STMicroelectronics
CMOS technology with 6 metal layers
Next run: 2016/11/21

IC 130nm HCMOS9A

STMicroelectronics
CMOS High Voltage technology with 4 metal layers
Next run: 2016/11/02

IC 0.18µm BCD8SP

STMicroelectronics
BCD High Voltage technology with 4 metal layers
Next run: 2016/11/14

IC 0.18µm C18A6

ams
CMOS technology with 6 metal layers, for Power management applications MEMS and Sensor interfaces Other SOC applications in Medical, Automotive and Industrial High performance mixed analog/digital applications
Next run: 2016/11/21

IC 0.18µm H18A6

ams
CMOS High Voltage technology with 6 metal layers, for Mixed signal analog digital, HV designs, system on chip
Next run: 2016/11/21

IC 0.35µm C35B4C3

ams
CMOS technology with 4 metal layers, for Mixed signal analog digital, large digital designs, system on chip
Next run: 2016/11/14

IC 0.35µm BARC C35B4OA

ams
CMOS Opto BARC technology with 4 metal layers, for Provides enhanced optical sensitivity for embedded photodiodes and high density CMOS camera products.

IC 0.35µm ARC C35B4O1

ams
CMOS Opto ARC technology with 4 metal layers, for Provides enhanced optical sensitivity for embedded photodiodes and high density CMOS camera products.
Next run: 2016/11/14

IC 0.35µm RF C35B4M3

ams
CMOS RF technology with 4 metal layers, for Mixed signal analog digital, large digital designs, system on chip, RF.
Next run: 2016/12/12

IC 0.35µm H35B4D3

ams
CMOS High Voltage technology with 4 metal layers, for Mixed signal analog digital, HV designs, system on chip
Next run: 2016/10/28

IC 0.35µm C35B4E3

ams
CMOS technology with 4 metal layers, for The process is fully compatible with C35B4C3 Mixed signal analog digital, large digital designs, system on chip

IC 0.35µm S35D4M5

ams
BiCMOS SiGe technology with 4 metal layers, for Mixed signal analog/RF/digital, large digital designs, system on chip
Next run: 2016/12/12

MEMS Specific MEMS technologies PolyMUMPs

MEMSCAP
MEMS MUMPS, for MEMS, micromechanics, MOEMS.

MEMS Specific MEMS technologies SOIMUMPs

MEMSCAP
MEMS MUMPS, for MEMS, micromechanics, MOEMS

MEMS Specific MEMS technologies PiezoMUMPs

MEMSCAP
MEMS PiezoMUMPS, for MEMS, micromechanics, MOEMS

MEMS Specific MEMS technologies MetalMUMPs

MEMSCAP
MEMS MUMPS, for MEMS, micromechanics, MOEMS

MEMS Bulk Micromachining Frontside Bulk Micromachining

ams
CMOS FS Bulk Micromachining technology with 4 metal layers, for MEMS, micromechanics, MOEMS.

MEMS Bulk Micromachining Backside Bulk Micromachining

ams
CMOS BS Bulk Micromachining technology with 4 metal layers

MEMS TDSI MIDIS TM MIDIS

TELEDYNE DALSA
MEMS, for Accelerometers Gyroscopes Resonators Inertial sensor combos (Sensor fusion)

MEMS Micralyne MicraGEM-Si TM MicraGEM-Si

Micralyne
MEMS, for Display technology Optics and telecommunications Inertial sensing Biomedical and environmental sensing

OPEN 3D Frontside UBM post-process

IRT Nanoelec/LETI-CEA
Wafer-level packaging, for Si-Si assembly

OPEN 3D Frontside Micro-Bumps post-process

IRT Nanoelec/LETI-CEA
Wafer-level packaging, for Si-Si assembly

OPEN 3D Frontside Bumps post-process

IRT Nanoelec/LETI-CEA
Wafer-level packaging, for Single die flip-chip, Si-Si assembly

OPEN 3D Backside post-process (TSV, RDL & Bumps)

IRT Nanoelec/LETI-CEA
Wafer-level packaging, for Single die flip-chip, Si-Si assembly

Passive Silicon Interposer with UBM

ams
Si-Interposer technology with 4 metal layers, for Passive Silicon Si-Interposer

ams 0.35 Wafer-level bumping

ams
Wafer-level packaging, for Single die flip-chip packaging

Photonic MPW Prototyping Si310-PHMP2M

IRT Nanoelec/LETI-CEA
Si-Photonics technology with 2 metal layers, for Telecom, DataCom, ComputerCom
Next run: 2016/11/02

0.35µm Active Silicon Interposer with UBM

ams
Si-Interposer technology with 4 metal layers, for Active Silicon Si-Interposer